Cirrus Logic's format packs 4 pixel samples into a single u_int32 by sacrificing precision on each sample. Y samples are truncated to 5 bits each, U and V have 6 bits per sample.
Horizontal | Vertical | |
Y Sample Period | 1 | 1 |
V Sample Period | 4 | 1 |
U Sample Period | 4 | 1 |
Effective bits per pixel : 8
Positive biHeight implies top-down image (top line first)